View APL5316-12BI-TRG_4659883.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

APL5316
Low Dropout 300mA Linear Regulator With Power-Ok Indicator Features
* * * * * * * * * * * Wide Operating Voltage: 2.8~6V Fixed Output Voltage in the range of 0.8V~5.5V Low Dropout Voltage: 170mV(typical) @ 300mA Guaranteed 300mA Output Current Power-Ok Indicator Current Limit Protection with Foldback Current Internal Soft-Start Over Temperature Protection Stable with Low ESR Ceriamic Capacitors SOT-23-5 Package Lead Free and Green Devices Available (RoHS Compliant)
General Description
The APL5316 is a low dropout linear regulator which needs only a single input voltage supply from 2.8 to 6V, and it can deliver output current up to 300mA. It can work with low ESR ceramic capacitors and ideally use in the battery-powered applications, such as notebook computers and cellular phones. Its typical dropout voltage is only 170mV at 300mA loading. A power-ok detection indicates the output status at POK pin. The current limit protection (with foldback current) and thermal shutdown functions protect the device against current overloads and over temperature. The APL5316 is available in a SOT-23-5 package.
Pin Configuration
VIN 1 GND 2 SHDN 3 APL5316 SOT-23-5 4 POK 5 VOUT
Applications
* * * Cellular Phones Portable and Battery-powered Equipment Notebook and Personal Computers
Ordering and Marking Information
APL5316 Assembly Material Handling Code Temperature Range Package Code Voltage Code Package Code B : SOT-23-5 Operating Junction Temperature Range I : -40 to 85 C Handling Code TR : Tape & Reel Voltage Code 12 : 1.2V 33 : 3.3V Assembly Material L : Lead Free Device G: Halogen and Lead Free Device X - Date code
APL5316 -12 B:
365X
APL5316 -33 B:
36RX
Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020C for MSL classification at lead-free peak reflow temperature. ANPEC defines "Green" to mean lead-free (RoHS compliant) and halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by weight).
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright (c) ANPEC Electronics Corp. Rev. A.21 Aug, 2008 1 www.anpec.com.tw
APL5316
Simplified Application Circuits
APL5316 1 CIN VIN VOUT 5 POK COUT R1
APL5316 1 CIN VIN VOUT 5 R1 POK 4 POK COUT
VIN
VOUT
VIN
VOUT
3 SHDN GND 2
POK 4
3 SHDN GND 2
VIN
Absolute Maximum Ratings
Symbol VIN VSHDN PD TJ TSTG TSDR Parameter VIN Supply Voltage (VIN to GND) SHDN Input Voltage (SHDN to GND) Power Dissipation Junction Temperature Storage Temperature Maximum Lead Soldering Temperature, 10 Seconds Rating -0.3 ~ 6.5 -0.3 ~ 6.5 Internally Limited -40 ~ 150 -65 ~ 150 260 Unit V V W X C X C X C
Thermal Characteristics
Symbol JA JC Parameter Thermal Resistance-Junction to Ambient Thermal Resistance- Junction to Case
(Note 1)
Typical Value 240 130
Unit
o
C/W C/W
o
Note 1 : JA is measured with the component mounted on a high effective thermal conductivity test board in free air.
Recommended Operating Conditions
Symbol VIN VOUT IOUT COUT TJ VIN Supply Voltage Output Voltage VOUT Output Current Output Capacitor Junction Temperature Parameter Range 2.8 ~ 6 Fixed Voltage 0 ~ 300 1.5 ~ 22 -40 ~ 125 Unit V V mA F
o
C
Copyright (c) ANPEC Electronics Corp. Rev. A.2 - Aug, 2008
2
www.anpec.com.tw
APL5316
Electrical Characteristics
Unless otherwise specified, these specifications apply over VIN = VOUT+1V (min VIN=2.8V), IOUT=0~300mA, CIN = 1F, COUT = 2.2F, TA = -40 to 85oC. Typical values are at TA = 25oC.
Symbol VIN IQ Parameter Input Voltage Quiescent Current Output Voltage Accuracy REGLINE Line Regulation REGLOAD Load Regulation VDROP PSRR ILIMIT ISHORT Dropout Voltage Power Supply Ripple Rejection Ratio Current Limit Foldback Current SHDN Input Voltage High SHDN Input Voltage Low Shutdown VIN Supply Current SHDN Pull Low Resistance VOUT Discharge MOSFET RDS(ON) Over Temperature Threshold Over Temperature Hysteresis TSS VPOK VPNOK Soft-Start Interval POK threshold Voltage for Power Ok POK threshold Voltage for Power Not Ok POK Low Voltage VOUT Rising VOUT falling POK sinks 5mA SHDN = Low SHDN = Low, VIN = 6V VOUT = 0V IOUT =10mA ~300mA IOUT=10mA G OUT%/G IN, IOUT=10mA V V G OUT%/GOUT V I VOUT = 3.3V, IOUT = 300mA f = 10kHz, IOUT = 300mA Test Conditions Min. 2.8 -2 -0.06 -0.2 450 1.6 89 78 APL5316 Typ. 135 170 45 600 80 0.1 3 60 160 40 60 92 81 0.25 Max. 6 160 +2 +0.06 +0.2 300 V 0.4 1 95 84 0.4 A M X C X C s %VOUT %VOUT V V A % %/V %/A mV dB mA mA Unit
Copyright (c) ANPEC Electronics Corp. Rev. A.2 - Aug, 2008
3
www.anpec.com.tw
APL5316
Typical Operating Characteristics
Quiescent Current vs. Supply Voltage
160 140 Quiescent Current, IQ (A) 120 100 80 60 40 20 0 0 1 2 3 4 5 6 7 Supply Voltage, VIN (V) IOUT= 0mV
Quiescent Current vs. Junction Temperature
138 136 Quiescent Current, IQ (A) 134 132 130 128 126 -50 -25 0 25 50 75 100 125
Junction Temperature, T J (X C)
Quiescent Current vs. Output Current
180 160 Quiescent Current, IQ (A) 140 VIN=5.5V
PSRR (dB) 0 -10 -20
PSRR vs. Frequency
VIN=3.3V, VOUT=1.2V CIN=1F, COUT=2.2F IOUT=300mA
120 100 80 60 0 50 100
-30 -40 -50 -60
VIN=4.5V
150
200
250
300
1000
10000
100000
1000000
Output Current, I OUT (mA)
Frequency (Hz)
Dropout Voltage vs. Output Current
250 VOUT=3.3V Dropout Voltage, VDROP (mV) 200 TJ=125X C TJ=25X C TJ=75X C
Current Limit vs. Junction Temperature
650 VIN=5V
150
Current Limit, ILIMIT (mA)
600
550
100 TJ=0X C TJ=-50X C
500
50
0 0 100 200 Output Current, IOUT (mA) 300
450 -50 -25 0 25 50 75 Junction Temperature, T J (X C) 100 125
Copyright (c) ANPEC Electronics Corp. Rev. A.2 - Aug, 2008
4
www.anpec.com.tw
APL5316
Typical Operating Characteristics (Cont.)
Loop Gain vs. Frequency
50 40 30 20 Loop Gain (dB) 10 0 -10 -20 -30 -40 1000 10000 100000 1000000 Frequency (Hz) IOUT=300mA
40 20 0 1000 10000 100000 Frequency (Hz) 1000000 IOUT=100mA 160
Phase vs. Frequency
140 120 Phase (degree) 100 80 60 VIN=3.3V, VOUT=1.2V, CIN=1F, C OUT=2.2F IOUT=300mA
VIN=3.3V, VOUT=1.2V, CIN=1F, COUT=2.2F IOUT=100mA
Operating Waveforms
Load Transient
VIN=3.3V, VOUT=1.2V, CIN=1F, COUT=2.2F, TR=1s
Line Transient
VOUT=1.2V, CIN=1F, COUT=2.2F, TR=10s, IOUT=10mA
V OUT
V IN
V OUT
IOUT
CH1 : VOUT, 50mV/div, AC CH2 : IOUT, 100mA/div, DC Time : 100s/div
CH1 : VIN, 1V/div, DC CH2 : VOUT, 20mV/div, AC Time : 100s/div
Copyright (c) ANPEC Electronics Corp. Rev. A.2 - Aug, 2008
5
www.anpec.com.tw
APL5316
Operating Waveforms (Cont.)
Enable
VOUT=1.2V
Shutdown
VOUT=1.2V
V OUT
V OUT
V SHDN
V SHDN
I OUT
I OUT
CH1 : VOUT, 500mV/div CH2 : VSHDN, 5V/div CH3 : IOUT, 200mA/div Time : 50s/div
CH1 : VOUT, 500mV/div CH2 : V , 5V/div SHDN CH3 : IOUT, 200mA/div DC Time : 10s/div
Power on
Power off
V IN
V IN
V OUT
V OUT
I OUT
I OUT
CH1 : VIN, 2V/div CH2 : VOUT, 500mV/div CH3 : IOUT, 100mA/div Time : 200s/div
CH1 : VIN, 2V/div CH2 : VOUT, 500mV/div, CH3 : IOUT, 100mA/div Time : 50ms/div
Copyright (c) ANPEC Electronics Corp. Rev. A.2 - Aug, 2008
6
www.anpec.com.tw
APL5316
Operating Waveforms (Cont.)
POK
VIN
1 2
VOUT
POK
3
IOUT
4
CH1 : VIN, 2V/div CH2 : VOUT, 1V/div, CH3 : POK, 2V/div CH4 : IOUT, 200mA/div Time : 1ms/div
Pin Description
PIN No 1 2 3 4 5 NAME VIN GND SHDN POK VOUT Voltage supply input pin Ground pin Shutdown control pin, logic high: enable; logic low: shutdown Power-ok signal output pin Regulator output pin FUNCTION
Copyright (c) ANPEC Electronics Corp. Rev. A.2 - Aug, 2008
7
www.anpec.com.tw
APL5316
Block Diagram
SHDN
Shutdown Logic Thermal Shutdown + Current Limit
VIN
VOUT POK
X92%
+
GND
0.8V
Typical Application Circuit
1
VIN
APL5316 1 CIN
1gF
VIN
VOUT POK GND 2
5 4 POK
VOUT
3 SHDN
COUT R1
1K[ 2.2gF
VIN
2.2F/GRM155R60J225M Murata
Copyright (c) ANPEC Electronics Corp. Rev. A.2 - Aug, 2008
8
www.anpec.com.tw
APL5316
Typical Application Circuit (Cont.)
2.
VIN
APL5316 1 CIN
1gF
VIN
VOUT POK
5 4
1K[
VOUT R1
3
SHDN GND 2
POK
COUT
2.2gF
Function Description
Internal Soft-Start An internal soft-start function controls rising rate of the output voltage to limit the surge current at start-up. The typical soft-start interval is about 60s. Shutdown Control Power-ok (POK) The APL5316 indicates the status of the output voltage. As the VOUT rises and reaches the Power-ok threshold (VPOK), the IC turns off the internal NMOS of the POK to indicate the output is ok. As the VOUT falls and reaches the falling Power-ok threshold (VPNOK), the IC immediately turns on the NMOS of the POK to indicate the output is not ok. The resistance of the resistor R1 connected from VOUT to POK or VIN to POK should be in the range from 1K to 50K. Thermal Shutdown A thermal shutdown circuit limits the junction temperature of the APL5316. When the junction temperature exceeds +160 C, a thermal sensor turns off the output PMOS, allowing the device to cool down. The regulator regulates the output again through initiation of a new softstart cycle after the junction temperature cools by 40C. The thermal shutdown is designed with a 40C hysteresis to lower the average junction temperature during continuous thermal overload conditions, extending life time of the device. The APL5316 has an active-low shutdown function. Forcing SHDN high (>1.6V) enables the VOUT; forcing SHDN low (<0.4V) disables the VOUT. SHDN is internally pulled low by a resistor (3M typical). If shutdown control is not necessary, please connect SHDN pin to VIN for normal operation. For normal operation, the device power dissipation should be externally limited by the design to keep the junction temperature below 125C.
Copyright (c) ANPEC Electronics Corp. Rev. A.2 - Aug, 2008
9
www.anpec.com.tw
APL5316
Application Information
Input Capacitor The APL5316 requires proper input capacitors to supply surge current during stepping load transients to prevent the input rail from dropping. Because the parasitic inductor from the voltage sources or other bulk capacitors to the VIN limits the slew rate of the surge current, it is recommeded to place the Input capacitors near VIN as close as possible. Input capacitors should be larger than 1F and a minimum ceramic capacitor of 1F is necessary. Output Capacitor The APL5316 needs a proper output capacitor to maintain circuit stability and improve transient response over temperature and current. In order to insure the circuit stability, the proper output capacitor value should be larger than 2.2F. With X5R and X7R dielectrics, 2.2F is sufficient at all operating temperatures. Large output capacitor value can reduce noise and improve load-transient response and PSRR, however, it also affects power on issue. Equation (1) shows the relationship between the maximum COUT value and VOUT.
COUT(max) = 31 6 VOUT ...............................(1)
Operation Region and Power dissipation The APL5316 maximum power dissipation depends on the thermal resistance and temperature difference between the die junction and ambient air. The power dissipation PD across the device is: PD = (TJ - TA) / JA where (TJ-TA) is the temperature difference between the junction and ambient air. JA is the thermal resistance between Junction and ambient air. Assuming the TA=25 oC and maximum TJ=160 oC (typical thermal limit threshold), the maximum power dissipation is calculated as: PD(max)=(160-25)/240 = 0.56(W) For normal operation, do not exceed the maximum junction temperature rating of TJ = 125 oC. The calculated power dissipation should be less than: PD =(125-25)/240 = 0.41(W) The GND provides an electrical connection to ground and channels heat away. Connect the GND to ground by using a large pad or ground plane. Layout Consideration Figure 2 illustrates the layout. Below is a checklist for your layout: 1. Please place the input capacitors close to the VIN. 2. Ceramic capacitors for load must be placed near the load as close as possible. 3. To place APL5316 and output capacitors near the load is good for performance. 4. Large current paths, the bold lines in figure 2, must have wide tracks.
Where the unit of COUT is F and VOUT is V. Figure 1 shows the curve of maximum output capacitor over the output voltage. The output voltage range is from 0.8 to 5.5V and the output capacitor value should be under the line. Output capacitors must be placed at the load and ground pin as close as possible and the impedance of the layout must be minimized.
31
Output Capacitor (F)
28
25
22 0 1 2 3 4 5 6
Output voltage (V) Figure 1
Copyright (c) ANPEC Electronics Corp. Rev. A.2 - Aug, 2008
10
www.anpec.com.tw
APL5316
Application Information (Cont.)
PCB Layout Consideration ( Cont.)
CIN APL5316 VIN 1 VOUT VOUT GND 2 5 R1 COUT LOAD VIN
Figure 2
Copyright (c) ANPEC Electronics Corp. Rev. A.2 - Aug, 2008
11
www.anpec.com.tw
APL5316
Package Information
SOT-23-5
D e
SEE VIEW A
E1
b e1
E
c
0.25
GAUGE PLANE SEATING PLANE VIEW A SOT-23-5 INCHES MIN. MAX. 0.057 0.000 0.035 0.012 0.003 0.106 0.102 0.055 0.037 BSC 0.075 BSC 0.60 8 0.012 0 0.024 8 0.006 0.051 0.020 0.009 0.122 0.118 0.071 MAX. 1.45 0.15 1.30 0.50 0.22 3.10 3.00 1.80
A2 A1
A
S Y M B O L A A1 A2 b c D E E1 e e1 L 0
MILLIMETERS MIN.
0.00 0.90 0.30 0.08 2.70 2.60 1.40 0.95 BSC 1.90 BSC 0.30 0
Note : 1. Follow JEDEC TO-178 AA. 2. Dimension D and E1 do not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil per side.
Copyright (c) ANPEC Electronics Corp. Rev. A.2 - Aug, 2008
12
0
L
www.anpec.com.tw
APL5316
Carrier Tape & Reel Dimensions
OD0 P0 P2 P1 A E1 F K0 B SECTION A-A T B0 A0 OD1 B A SECTION B-B
d
Application
A
H
H A
T1
T1
C
d
D 20.2 MIN. T
W
E1
W
F 3.5O .05 0 K0
178.0O .00 50 MIN. 2
SOT-23-5
8.4+2.00 13.0+0.50 1.5 MIN. -0.00 -0.20 P2 2.0O .05 0 D0 1.5+0.10 -0.00 D1 1.0 MIN.
8.0O .30 1.75O .10 0 0 A0 B0
P0 4.0O .10 0
P1 4.0O .10 0
0.6+0.00 0 0 0 -0.40 3.20O .20 3.10O .20 1.50O .20
(mm)
Devices Per Reel
Package Type SOT-23-5 Unit Tape & Reel Quantity 3000
Copyright (c) ANPEC Electronics Corp. Rev. A.2 - Aug, 2008
13
www.anpec.com.tw
APL5316
Taping Direction Information
SOT-23-5
USER DIRECTION OF FEED
Reflow Condition
TP
(IR/Convection or VPR Reflow)
tp Critical Zone TL to TP Ramp-up
TL
Temperature
tL Tsmax
Tsmin Ramp-down ts Preheat
25
t 25C to Peak
Time
Reliability Test Program
Test item SOLDERABILITY HOLT PCT TST ESD Latch-Up Method MIL-STD-883D-2003 MIL-STD-883D-1005.7 JESD-22-B, A102 MIL-STD-883D-1011.9 MIL-STD-883D-3015.7 JESD 78
14
Description 245C, 5 sec 1000 Hrs Bias @125C 168 Hrs, 100%RH, 121C -65C~150C, 200 Cycles VHBM > 2KV, VMM > 200V 10ms, 1tr > 100mA
www.anpec.com.tw
Copyright (c) ANPEC Electronics Corp. Rev. A.2 - Aug, 2008
APL5316
Classification Reflow Profiles
Profile Feature Average ramp-up rate (TL to TP) Preheat - Temperature Min (Tsmin) - Temperature Max (Tsmax) - Time (min to max) (ts) Time maintained above: - Temperature (TL) - Time (tL) Peak/Classification Temperature (Tp) Time within 5C of actual Peak Temperature (tp) Ramp-down Rate Time 25C to Peak Temperature Sn-Pb Eutectic Assembly 3C/second max. 100C 150C 60-120 seconds 183C 60-150 seconds See table 1 10-30 seconds 6C/second max. 6 minutes max. Pb-Free Assembly 3C/second max. 150C 200C 60-180 seconds 217C 60-150 seconds See table 2 20-40 seconds 6C/second max. 8 minutes max.
Note: All temperatures refer to topside of the package. Measured on the body surface.
Table 1. SnPb Eutectic Process - Package Peak Reflow Temperatures Package Thickness <2.5 mm 2.5 mm Volume mm <350
3
Volume mm 350
3
240 +0/-5C 225 +0/-5C
225 +0/-5C 225 +0/-5C
Table 2. Pb-free Process - Package Classification Reflow Temperatures Package Thickness Volume mm <350
3
Volume mm 350-2000
3
Volume mm >2000
3
<1.6 mm 260 +0C* 260 +0C* 260 +0C* 1.6 mm - 2.5 mm 260 +0C* 250 +0C* 245 +0C* 2.5 mm 250 +0C* 245 +0C* 245 +0C* * Tolerance: The device manufacturer/supplier shall assure process compatibility up to and including the stated classification temperature (this means Peak reflow temperature +0C. For example 260C+0C) at the rated MSL level.
Customer Service
Anpec Electronics Corp. Head Office : No.6, Dusing 1st Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 2F, No. 11, Lane 218, Sec 2 Jhongsing Rd., Sindian City, Taipei County 23146, Taiwan Tel : 886-2-2910-3838 Fax : 886-2-2917-3838
Copyright (c) ANPEC Electronics Corp. Rev. A.2 - Aug, 2008
15
www.anpec.com.tw

▲Up To Search▲

Price & Availability of APL5316-12BI-TRG

	To Download APL5316-12BI-TRG Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .